1. Technical Field
Embodiments of the present disclosure relate to semiconductor devices and methods of fabricating the same, and more particularly, to MOS transistors having low offset values, electronic devices including the same, and methods of fabricating the same.
2. Related Art
Electronic devices such as memory devices and logic devices may include metal-oxide-semiconductor field effect transistors (MOSFETs, also referred to as MOS transistors). The memory devices may include dynamic random access memory (DRAM) devices and static random access memory (SRAM) devices, and the logic devices may include processors such as central processing units (CPUs). The MOS transistors included in the electronic devices may constitute various circuits, and functions of the electronic devices may be determined according to configurations of the circuits including the MOS transistors. Thus, characteristics of the MOS transistors may influence the functions of the electronic devices.
In particular, when a plurality of MOS transistors are integrated in a semiconductor substrate (or semiconductor wafer) to constitute electronic devices, electrical and physical parameters of the MOS transistors may be non-uniform according to where the MOS transistors are implemented in the semiconductor substrate due to non-uniformity of fabrication processes or due to physical phenomena occurring while the MOS transistors operate. Thus, some of the electronic devices fabricated in the semiconductor substrate may malfunction and thus decrease a process yield. For example, in case of an operational amplifier (OP-AMP), two input MOS transistors constituting the OP-AMP may be fabricated to have different parameters. In such a case, the OP-AMP may exhibit an offset voltage of about several milli-voltages. A chopping technique has been widely used to remove such an offset voltage. However, in such a case, a plurality of MOS transistors has to be additionally disposed in the OP-AMP to constitute a chopping circuit. As a result, the chopping technique may lead to degradation of the integration density of the OP-AMP.
The offset voltage of the OP-AMP may be caused by the non-uniform parameters (i.e., offset values) of the MOS transistors constituting the OP-AMP. One of major parameters affecting the offset values of the MOS transistors may be a threshold voltage or a transconductance. Ideally, all of MOS transistors constituting an electronic device such as the OP-AMP have to be formed to have the same threshold voltage. However, the MOS transistors constituting the electronic device may be formed in a semiconductor substrate to have non-uniform threshold voltages due to the non-uniformity of fabrication processes and geometric shapes of the MOS transistors. For example, threshold voltages of MOS transistors formed in a semiconductor substrate may be non-uniform because of a step difference between top surfaces of active layers in active regions and a top surface of an isolation layer in an isolation region. That is, the step difference between the active layers and the isolation layer may cause non-uniform electric fields. Accordingly, MOS transistors having gate electrodes disposed on interfacial regions between the active layers and the isolation layer may exhibit non-uniform threshold voltages. As a result, the MOS transistors having the non-uniform threshold voltages may have different characteristics.